E6600 + Asus P5W DH Deluxe Adventures

[Mr.Kakarot]

nice post, I have the same chip and board....

but I havent changed any of the other voltages... I really dont know what they are.... will they allow me to boot at higher fsb?

With my current settings, 400 x 9 is rock solid... anything over doesnt even try.

thx

[eva2000]

i leave vfsb and mch at 1.3 and 1.65v respectively and ICH at AUTO

More memory testing...

After testing 2 sets of 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH memory, it seems pair #2 is doing much better than pair #3 so far

Pair #2
* 510mhz 4-4-4-12 at 2.20v
* 519mhz 4-4-4-12 at 2.25v
* 523mhz 4-4-4-12 at 2.30v
* 533mhz 4-4-4-12 at 2.35v
* 541mhz 4-4-4-12 at 2.40v

vs

Pair #3
* 501mhz 4-4-4-12 at 2.20v
* 513mhz 4-4-4-12 at 2.25v
* 525mhz 4-4-4-12 at 2.35v
* 534mhz 4-4-4-12 at 2.40v

Pair #2 of 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH (0629) managed single 32M @542mhz 4-4-4-12 at 2.4v and dual 32M @541mhz 4-4-4-12 at 2.4v using default advance timings

single 32M @542mhz 4-4-4-12 at 2.4v


dual 32M @541mhz 4-4-4-12 at 2.4v

[eva2000]

Unfortunately, my P5W DH with 0801 bios with 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH (0629) doesn't seem to like 4:5 upclock divider past 378fsb (gives 472mhz mem) for now Nor does it like 2:3 beyond 360fsb (gives 541mhz mem). This is with manually set timings of 4-4-4-12 regardless of vdimm used. Haven't tried setting SPD for memory to boot yet.

P5W DH i have doesn't seem to like 4-4-3 timings where tRP = 3 either, can't pass memtest86+ v1.65 higher than 460-472mhz 4-4-3 (manually set in bios) regardless of vdimm used or divider used. Same memory on Badaxe board did 488mhz 4-4-3-5 at 2.2v!

But 1:1 seems best for E6600 due to max fsb limitations I wonder how far i can go just for testing single Super Pi v1.50 32M

Testing max single Super Pi v1.50 32M:

vdimm = 2.3v (seems to help stable things due to tighter timings at 1:1 clocks especially when you get closer to P5W DH's max FSB wall)

Bios Settings:

vFSB = 1.3v
vMCH = 1.65v
vICH = AUTO
Performance mode = Standard
Hyperpath3 = Disabled
DDRAM Throttling = Disabled

* All tests are straight boot from bios with manual timings set at 4-4-4-8 4 at 2.3v
* All tests are untweaked with default P5W DH set timings. Have yet to even tweak with memset or drop tRP to 3 yet.

@3807Mhz - 9x423fsb at 1.55v bios vcore = 1.508 bios
32M = 13min 41.797s

@3897Mhz - 9x433fsb at 1.6v bios vcore
32M = 13min 16.672s

@3924Mhz - 9x436fsb at 1.625v bios vcore
32M = 13min 09.953s

@3942Mhz - 9x438fsb at 1.6375v bios vcore
32M = 13min 09.578s

Hit max FSB limit of vMCH 1.65v, raised vMCH to 1.75v

@3960Mhz - 9x440fsb at 1.65v bios vcore
32M = 13min 04.969s

@3987Mhz - 9x443fsb at 1.6625v bios vcore = 1.64v windows idle and 1.61-1.63v load
32M = 13min 00.750s



Yes I could sneeze and break 13min

[Dubz]

eva

thanks for this post. it help me to finally get a decent o'clock out of this board. currently sitting at 3.51.

thanks again

[eva2000]

Glad I could help

[eva2000]

Now to try tighter memory timings of 4-4-3-8. I started to test at 9x437fsb = 3934Mhz 1:1. It seems for default P5W DH advance timings I can pass 32M find. But if I try tightening the advance timings in memset @437mhz 4-4-3-8 it will fail..... unless I loosen tRD from 6 to 7. Then I can tighten all the rest of the memset timings while keeping tRD at 7

Bios Settings:

vCore = 1.65v
vDIMM = 2.3v
vFSB = 1.3v
vMCH = 1.65v
vICH = AUTO
Performance mode = Standard
Hyperpath3 = Disabled
DDRAM Throttling = Disabled

@3934Mhz - 9x437fsb, default P5W DH timings (left) vs memset tweaked timings with tRD set at 7. (right)
Super Pi 32M = 13min 04.594s vs 13min 01.125s

So decided to use Clockgen to boost fsb from 437fsb to 440fsb and guess what with tRD loosened to 7, it passed fine without needing vMCH of 1.75v! This was done with vMCH of 1.65v @3962Mhz - 9x440fsb 4-4-3-8

[eva2000]

Time to try and max out this E6600 of mine

vcore = 1.6625v bios = 1.64v idle windows /1.61-1.62v under load
vdimm = 2.35v
vFSB = 1.3v
vMCH = 1.75
vICH = AUTO
Performance Mode = Standard

http://valid.x86-secret.com/show_oc.php?id=115697


Max 32M so far

@4011Mhz - 9x445fsb 1:1 4-4-3-8


@3986Mhz - 9x443fsb 1:1 4-4-3-8

[eva2000]

Analysis of P5W DH memory 4:5 and 2:3 dividers

I've been messing around with 4:5 and 2:3 dividers are lower FSB clocks and checking memset to see what values are being set since i'd having issues in memtest86+ v1.65 test #7 errors in high fsb 4:5 mode.

In 2:3 I maxed out my memory @542mhz 4-4-4-12 at 2.4v which showed the following memset timing values



tRFC = 42
tRD = 6
Write to Precharge Cmd = 13
Write to Read Cmd = 10
Read-Write Turnaround CLKs = 8
Write-Read Turnaround CLKs = 6
tRTP = 5

Now in 4:5 mode the only changes in memset are for:

tRFC = 35
Write to Precharge Cmd = 12

As you see it's tighter than at 2:3 set memset timings. So I booted into windows from bios at 9x378fsb 4:5 with memory at 472.5mhz 4-4-4-12 at 2.3v and used clockgen to clock up incrementally to test the max FSB:MEM clocks and find out how loosening these memset options will effect max 4:5 FSB:MEM clocks.

Results:
Using Systool dual 32M PI (cpu test), I managed to use Clockgen to raise FSB from 378fsb to 394fsb (493mhz 4-4-4-12 for memory) before it started to fail/error out. This was still with default memset timings where tRD = 6. I then raised tRD from 6 to 7, and easily managed to raise FSB from 394fsb to 400fsb (500mhz 4-4-4-12 for memory) and pass the tests without errors!

With tRD = 7, i could even tighten tRFC from 35 down to 20 with no problems.

@3600Mhz - 9x400fsb 4:5 500mhz 4-4-4-8 at 2.3v (more vdimm allows to handle tigher tRFC values but tRD needed 7)


So it does seem for 4:5 divider the culprit maybe tRD = 6. Now some folks managed to get high 4:5 clocks on P5W DH and I suspect this due to higher voltages or voltage mods on vdimm and vMCH as these two voltages help the memory/MCH handle the tight tRD value of 6 apparently. With enough voltage you could clock the memory higher for 4:5 ratio

Seems to me that for 975x chipset, both the max FSB limits and inability to handle high fsb in 4:5 and 2:3 dividers all comes down to tRD being too tight at 6. How far you can take your FSB and clocks in async divider mode, depend on:

1. MCH/NB quality and latencies
2. MCH/NB cooling - better MCH/NB cooling = higher FSB and higher memory clocks
3. MCH Voltage
4. Memory modules used - if the memory can handle tRD = 6 well then it will clock higher, allowing high FSB
5. vDIMM - memory voltage helps memory handle tighter advance timings, thus higher max FSB

[M.Beier]

haven't measured via dmm only software heh but i believe the droop is correct

3.6ghz out of the box was easy as pie hehe

not sure about VRM cooling i have the heatpipe on but reapplied TIM on it and have removed those covers as i stated above


corrected typo SATA1 hehe, 9x440fsb isn't stable going to drop multipler to find the max fsb.. i have timings manually enabled never SPD with no probs

1.65v MCH i would consider safe if you have the cooling i'd probably change the stock NB heatsink if you want to run it 24/7 - i'm going to use Thermaltake Extreme Spirit II NB heatsink since i'll take it off my Bad axe hehe



re-read 1st post stock heatpipes with covers off, reapplied TIM and fan over them.. haven't tried 4:5 yet i've only had this P5W DH for less than 48-72hrs need time to test hehe


thanks mate...


i had to raise my MCH from 1.55v to 1.65v to get 9x400fsb = 3600mhz at 1.376v stable as i reported in 1st post at 1.55v it will error out in stressprime after a few minutes

as to questions of where my ES came from, i could tell you but i'd then have to kill ya LOL

more results coming soon

Hehe, well I dont need to know neither, they're quite easy to get
Was to the "on retail FSB" part
Hmm, this is odd, I use alot higher vcore, but thats quite normal for step6, also due my board has MAJOR Vdroop.
Hmm, one odd thing though, my mem, they wont run P95 stable at speeds even 100mhz lower than benchable.. - They do 4-3-2-4 at 530mhz, but wont do 4-3-2-4 at 400mhz, odd..? I'd like 4-4-4-4 at 500mhz, gonna give it a shot with raising the vmch, but cant really see that helping, but if theres a chance, its sure worth doing

[eva2000]

Further proof, i upped vdimm to 2.4v with vMCH still at 1.65v and booted into windows at 9x390fsb 4:5 487mhz 4-4-4-8. Using memset loosened timings to match that of default 2:3 divider tRFC = 42 and Write to Precharge Cmd = 13 but loosened tRD from 6 to 7. Managed to clock memory right up to 540mhz 4-4-4-8 at 2.4v without problems for single 32M and 538mhz 4-4-4-8 for dual 32M.

Single 32M @540mhz 4-4-4-8 at 2.4v


Dual 32M @538mhz 4-4-4-8 at 2.4v

[VictorWang]

nice review geroge

[eva2000]

Thanks Vic

[eva2000]

Decide to push my E6600 a bit harder with stock heatpipe MCH/NB heatsink still, i bumped vcore and vMCH in bios to 1.675v (1.64-1.65v windows) and 1.85v respectively and managed to pull off

Max cpu validation @4261mhz - 9x473fsb
1M @4115mhz - 9x457fsb
32M @4023mhz - 9x447fsb

[Mykou]

Nice Eva !

Wish you could test a x10 multi with , to know what max fsb you get

Anyway , that's what I'd call a golden P5W DH ....

[eva2000]

no worries i have 2x E6700 B1s now too.. 2nd E6700 arrived today so more to come from me soon

Radiical Chipset Waterblock Installation

Time has come to remove stock heatpipe MCH/NB heatsink and replace it with Radiical.com.au chipset waterblock

First, I cut a piece of sticky back insulation foam horizontally to a paper near paper thin height and stuck it on the 2 corners of MCH green PCB near the hooks. Just added precaution in case i crush the MCH chipset core heh. Second, I put some Microcool silver mosfet heatsinks on the mosfets near the cpu socket.



Then mounted the Radiical chipset waterblock.



Will start testing now.. wish me luck

[Devious]

1M @4115mhz - 9x457fsb

I hoped it would have been stable higher than that for 1M with 1.85v MCH. I have a faulty pci-e slot so I was going to RMA for one of the newer revisions.

I managed 1M @4129mhz - 9x459fsb with my 1.65v MCH.

http://valid.x86-secret.com/show_oc?id=111061



I notice you are running your ram at 1:1 with 450+ FSB, my board wont boot at 1:1 above 430 FSB so i dropped to 4:3. Maybe you can get higher FSB with 4:3 ??

Great post btw, look forwards to see how your chipset waterblock fares

[vmsein]

That's a very nice looking chipset waterblock you have there, Eva. As usual, a very methodical and informative presentation of your observations. Thank you.

[vanovich]

really nice effort and findings there eva ,very helpfull

[AnjinSan1966]

Top notch info and presentation as always Eva2000 Very informative and detailed,i bet this will help alot of us that is struggling with our P5WDH boards

[famich]

Eva I got B2 revision chip , settings are in my sig. Currently I am sitting at 400x9 fully stable , games /Orthos

However I got Perf.mode set to "turbo " -should I switch it to "standard " if I d like to go higher ?
I ve got a nonmodded MB though and B2, so it s like a 3700-3800 maximum, but I d like to try .

THX

[eva2000]

thanks guys .. hope this thread does help other P5W DH users, it basically outlines everything

yup the chipset block is sexy ain't it

with 4:3 divider you can push max FSB higher since as I stated tRD = 6 is too tight for memory so it would make sense lowering memory clock will allow the memory to handle tRD = 6 and thereby allow FSB to go higher in 4:3 mode

I'll test 4:3 divider a bit later to see as well.

As to performance modes not sure i've only used Standard extensively since i started with P5W DH. Will have to try Turbo mode too.

[Gautam]

eva, I have to thank you for suggesting tRFC being loosened earlier in this thread. It helped me run 4:5 up to 480MHz (up from ~460)...but not much higher. (Memory is capable of 540MHz) So far I've been trying pushing tRD to 7 and running Standard performance mode, but unfortunately neither is seeming to help me break past this. Seems like this ram just isn't playing well with this board. :-/

I think you will find favorable results running Turbo. I've personally never tried Standard except on a couple of occasions. Testing only 1M it appeared a bit slower and didn't help me gain any raw speed.

[eva2000]

glad i could help, did you max your vdimm too 4:5 needs more vdimm that what your modules ran in 1:1 if you want to keep things very tight on timings as well..

[eva2000]

I put a thermal probe on top of my chipset waterblock too. At 9x448fsb = 4032Mhz at 1.675v (1.65v) and 1.85v MCH volts, even the top of chipset block gets hot ~40.5C to 42.5C under 32m Super Pi load and ~20C idle at 1st boot and rises to around ~26C idle in windows and post 32M load around ~39.1C idle consistently. This is with 22.5C room temps. This really does say don't use 1.85v MCH volts on air cooled MCH/NB heatsinks as it must get bloody hot!!!

I started with early memset86+ v1.5 testing, hoping that water cooled MCH/NB would give me higher memory clocks like it did on Intel D975XBX Badaxe. Unfortunately, the improvement in memory clocks was minor at 2:3 divider.

At 2:3 divider:

* before stock heatpipe air cooled MCH = max memory clock was 542mhz 4-4-4-12 at 2.4v
* radiical chipset water cooled MCH = max memory clock 542mhz 4-4-4-12 at 2.4v but could pass one loop of 545mhz 4-4-4-12 at 2.4v before memtest froze.

At 4:5 divider improvement was a bit better than at 2:3 divider even though tRD is still set too tight at 6:

* before stock heatpipe air cooled MCH = max fsb/mem clock before test #7 errored was at 378FSB with mem at 472mhz 4-4-4-12
* radiical chipset water cooled MCH = max fsb/mem clock before test #7 errored was now at 392FSB with mem at 490mhz 4-4-4-12

Max FSB at 1.65v MCH volts with dropping cpu multiplier to 8x, seems to still be around the same as on air at 438FSB. This could either mean I have a bad chipset waterblock mount, or it's not temps that is limiting FSB at 1.65v MCH volts but voltage itself or the memory used or more likely the tightness of the memset advance memory timings used. Even at 9x multiplier seems with 1.85v MCH the FSB limit has only improved a tad from 447FSB 32M to 448FSB 32M, it could be related to memset timings as i tightened them from the default to get the best 32M times or it could be due to vcore or cpu cooling since 9x448FSB is 4032Mhz

I'm leaning to either too tight memset values or a bad chipset waterblock mount as I did have a bit of trouble mounting the 2nd thread hook to the motherboards' hooks, so will remount it a bit later.

But for now still on first mount of chipset block, I managed to pull of a dozen runs of 32M at 9x448-449fsb testing different memset timings

On stock heatpipe MCH heatsink best i could do was 9x447fsb = 4023mhz for 12min 43.609s

Now with Radiical Chipset waterblock cooling MCH here's what i managed:

@9x448fsb straight boot from bios and memset set tRFC = 26 and other timings dropped to what you see below


@9x449fsb with tRD 7


@9x449fsb with tRD 6

[Jack]

Wow Eva, good read!

My vga is dead, so i haven't had the opportunity to test my E6600/p5wdh/D9GMH rig.
So lot's of new and good info here for me! This will defenitly give me a nice start once i start testing my stuff

And is there anyway to get more vdimm? So you could run like 9x449 4:5
It seems you can't run both max. cpu and ram clocks.